Static Timing Analysis Course | STA Course Online | Chipedge

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Synthesis, Signoff STA & LEC

Learn from Synthesis, STA Expert with 20+ yrs of Industry Experience, using Synopsys Tools  Design Compiler, Prime Time and Formality, with 24×7 VLSI Lab Access.

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  • Synopsys Tools

  • 100% Money Back Guarantee

  • 24x7 VLSI Lab Access

  • Start Date12th Feb 2022
  • Duration:9 Weeks
  • Training Type Instructor Led Live Online

Course Overview

This VLSI course comprehensively covers Sign off static timing analysis.  Further details will be published soon. How this Course Help in Your Career Growth: RTL Design/Application/CAD engineers can migrate to Synthesis/STA engineer roles or up-skill themselves to deliver effectively in their current positions. FPGA engineers can migrate to STA engineer roles. By acquiring Timing Closure proficiency, PD engineers can significantly improve turn around times of their blocks/designs. This, in turn, will help save valuable working hours as well as open up new growth opportunities.

Course Overview

9am-1pm saturdays

9am-1pm sundays

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Course Fee



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  • No Cost EMI option
  • 100% Money Back Guarantee
  • Group Discounts

Speak to our Learning Advisor for details.

  • In-depth know-how of using a design compiler for synthesizing the design modeled in Verilog or System Verilog.
  • Logical Equivalence Checking between Golden & Implemented design.
  • Timing Analysis and Timing Closure of Pre-Layout(Synthesized) and Post-Layout designs.

How this Course Help in Your Career Growth

  • RTL Design/Application/CAD engineers can migrate to Synthesis/STA engineer roles or up-skill themselves to deliver effectively in their current positions.
  • FPGA engineers can migrate to Synthesis/STA engineer roles.
  • By acquiring Timing Closure proficiency, PD engineers can significantly improve turn around times of their blocks/designs. This, in turn, will help save valuable working hours as well as open up new growth opportunities.

Course Delivery Model

Instructor-Led Online Live Virtual classroom training
Module-specific Lecture sessions and Labs conducted hand-in-hand
Emphasis on Lab driven hands-on training aimed at building key skills
Weekdays: Lab support through Email and WhatsApp
Flexible learning with Lab Access from home through VPN

Duration & Timings:

For Working Professionals:

  • 9:30 am to 1 pm, Saturday & Sundays
  • These timings are in IST (Indian Standard Timing) time zone.

For Freshers:

  • 9:30 am to 1 pm, Saturday & Sundays
  • 9:30 am to 5 pm, Tuesday – Friday (Trainer assistance on Labs, assignments, projects &  Self practice)
  • These timings are in IST (Indian Standard Timing) time zone.
  • Monday – Holiday
  • The course will be delivered by a Senior VLSI Engineer with lab assistance from a junior VLSI Engineer. Both are currently working in the VLSI industry on the latest technologies.

VLSI Tools & Lab

Synopsys Tools:

  • Prime Time SI

Technology Libraries To be Used:14nm Libraries

Lab Access

  • Flexible learning with online 24×7 lab access running on high-end cloud servers
  • Access VLSI Lab anytime anywhere using VPN

Who Can attend this Course

  • Freshers who would like to pursue a career in VLSI.
  • M.tech (VLSI) Interns/students, who want to learn Synthesis and Static Timing Analysis.
  • RTL Design, FPGA Design, DFT as well as Physical Design engineers who want to learn Synthesis and STA course thoroughly.
    Synthesis, STA Engineers who want to fill the gaps in their understanding & strengthen STA knowledge to deliver effectively in the current role.
  • CAD / Methodology Engineers or Application Engineers who come across Synthesis and  STA in their work.
    Any working VLSI Engineer seeking to learn Synthesis and STA.

Why Choose ChipEdge ?

Latest VLSI Courses
INDUSTRY RELEVANT COURSES

An exhaustive bouquet of VLSI courses, from Design to Tape-out in both Analog and Digital domains.

Industry experts trainers
EXPERT TRAINERS

A meticulous and stringent selection process in handpicking the best trainers from the industry with good experience & currently working on latest technologies.

Latest Synopsys tools
SYNOPSYS TOOLS

Latest Synopsys Tools with individual Licenses for each Learner. Labs & Projects designed as per latest industry needs.

Individual attention
PLACEMENT ASSISTANCE

Complimentary Job Assistance Program without any extra cost, to help our Learners get jobs with leading VLSI Companies.

Learning Management system
FLEXIBLE LEARNING MODELS

Multiple Learning Models to choose as per your Learning Needs & budget in most cost effective way.

24x7 Lab access
ONLINE VLSI LAB

Robust VLSI Lab with latest Synopsys Tools running on high end servers and high speed internet lines with 24x7 availability

Curriculum

  • Introduction to Synthesis
  • Synthesis Flow
  • Constraining Design for timing area & power
  • Understanding & Exploring .lib
  • Synthesize Design
  • Timing Checks
  • The report, Analyze and debug results
  • Optimization Techniques
  • Low Power Synthesis using UPF
    • Understanding the UPF and low power concepts
    • Understanding of Low power cells and their requirement
    • Low power synthesis using UPF file
  • Scan Insertion
  • STA overview & concepts
  • Clocking – Handling clock muxes, clock dividers
  • Generated clocks, Clocking Exceptions
  • Timing Exceptions
  • Post Layout STA using SPEF
  • Multi-Mode, Multi-Corner STA
  • Derates, OCV, Variations – Source and cause
  • Crosstalk & Noise Analysis
  • Timing ECOs generation, What-If Analysis
  • Timing Challenges
  • Loading reference & implemented design
  • Understanding & Matching compare points
  • Verifying design & interpreting results
  • Debugging the Non Equivalents

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Demo Videos

Video Reviews

Learner Reviews

Synthesis STA & LEC has given me enough exposure and hands-on, on design compiler, formal verification, prime time tools and real-time scenarios and labs are covered via VPA connection. One good thing is we can revisit online classes to learn and understand concept once again.

Manoj B

The Trainer is really good and helps one to understand the concepts right from the basics. Lab sessions, assignments, and projects are very helpful for practical understanding. Now, I am confident enough in handling the timing issues.

Atul

The best platform to learn concept from scratch along with practical skills. The curriculum was well communicated regardless of technical glitches. Project work helped to get a better grasp of concepts. Interested to attend DFT courses in detail.

Banetta Peter

FAQs

Training is delivered in Instructor-Led Virtual Class Room mode, on weekends. To attend the live sessions,  you need to login to the chip edge e-learning portal. For Lab access, you will connect to the ChipEdge VLSI lab through a VPN.

Timings:

9:30 am to 1 pm, Saturday & Sundays

These timings are in IST (Indian Standard Timing) time zone.

Session Details:

9.30 am to 11.00 am – Lecture session

11.00 am to 11.30 am – Tea Break

11.30 am to 01.00 pm – Lab Session

The course will be delivered by Senior VLSI Engineer with lab assistance from junior VLSI Engineer. Both are currently working in VLSI industry on latest technologies.

Chipedge trainers are typically having 10 to 20  years of VLSI industry experience and currently working in the latest technologies. They are typically project leads or project managers and are selected for their domain expertise, passion for sharing knowledge as well as good teaching skills.

They are available on weekends only, during class hours for live interaction.

Instructor-led online courses on weekends are primarily designed for working professionals who want to upskill themselves.

With shrinking technology nodes and increasing complexity of Chips, engineers are required to enhance their skills to stay relevant in their careers and increase their productivity.

Online courses can help you learn new skills as well as increase your knowledge in the area you are currently working. Skills that take years to master in the workplace can be imbibed in weeks using our combination of theory classes, hands-on training sessions, projects. As these sessions are delivered by Senior VLSI engineers with 10 to 20 years of industry experience, learning from their experiences is a big takeaway from these courses.

Considering time constraints for all working professionals, you can attend these courses from home.

We use the latest versions of Synopsys Tools, with a  dedicated tool license for every trainee during the lab/project work. 28nm libraries are used for labs, projects.

Synopsys tools are used by the majority of product / MNC companies in the semiconductor(VLSI) industry world wide, not just in India.

Lab Access is provided through VPN. This gives the flexibility to do labs anytime, anywhere at your convenience. All you need is a good broadband connection and a laptop.

It varies as per the course duration (short/long). please check the “Lab”  tab, in course pages. Our course counselors can help you as well.

We do have installment options for some courses. And EMI option is available through our partner organizations, who provide loans for training programs.  please check with our Course Counsellors.

Course completion certificates will be provided, whoever meets the course completion criteria.

Chipedge provides placement help to all candidates by providing them industry interview opportunities.

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