24/7 VPN Access - Weekday & Weekend Classes - Experienced Trainers

ChipEdge is unique in offering wide range of high quality Skill Development / Enhancement instructor led class room VLSI courses during weekends. Our course offering covers complete front end & back end flows across Digital and Analog domains.

Upcoming VLSI Courses Calendar

12-11-2018
Asic Design Verification {Full-Time}

Duration: 4.5 Months

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24-11-2018
DFT (SCAN & ATPG)

Duration: 10 Weeks(Sat)

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01-12-2018
Verification using UVM

Duration: 05 Weeks(Sat)

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01-12-2018
Physical Design

Duration: 12 Weeks(Sat)

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01-12-2018
CMOS Analog Circuit Design

Duration: 08 Weeks(Sat)

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20-01-2019
Analog Layout Design

Duration: 12 Weeks(Sun)

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20-01-2019
ASIC Design Verification

Duration: 15 weeks (Sat)

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09-02-2019
Synthesis Sign-Off STA and LEC

Duration: 07 Weeks(Sat)

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24-02-2019
Low Power Implementation(PD) using UPF

Duration: 4 Weeks(Sun)

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17-02-2019
TCL Scripting

Duration: 03 Weeks(Sat)

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23-02-2019
High Speed IO Circuit Design

Duration: 08 Weeks(Sat)

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16-03-2019
Verification using System Verilog

Duration: 06 Weeks(Sat)

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Highlights:

  • Trainers with rich (10-20 years) industry experience, currently working in the industry on latest technologies. They are very passionate to teach and excellent teaching skills.
  • Training with Industry standard tools, like Synopsys.
  • Certification and Course Credits leading to M.S. degree, from Global University of Engineering, USA
  • Additional lab hours through VPN, with 24×7 access.
  • Course designed by experts, as per the technical Skill requirements of Semiconductor Industry.
  • 50 to 70% of time on labs, to facilitate more hands on learning using tools.
  • Labs, Projects on latest technology nodes.
  • Cost effective and value for money, with good ROI (Return on Investment) through Career Growth.