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Advance Your Career withPhysical Design Certification

Learn Physical Design Course Online from Experts with 10+ yrs. of Industry Experience.

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The course is taught using Synopsys Tools, IC Compiler 2, Prime Time, StarRC, IC Validator, with Online VLSI Lab Access.

Start Date

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Duration

5 Months

Training Type

Live Online Classes

Designed for

  • Working Professionals - VLSI/ Embedded
  • Freshers - B.Tech/ M.Tech
  • Engineering College Faculties.
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Course Overview

VLSI Physical Design course, specially designed for working professionals to get comprehensive training to boost their career in VLSI Industry as a Physical Design Engineer. The course covers the latest industry requirements and is covered by trainers experienced in Physical Design.

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*No Cost EMI

More About The Course

Course Delivery Model

Duration & Timing

VLSI Tools & Lab

Who Can attend this Course

Payments

Placement Assistance

Course Delivery Model

  • Live Online training
  • Module-specific Lecture sessions & Labs conducted hand-in-hand.
  • Emphasis on Lab driven hands-on training aimed at building key skills.
  • Group mock interview sessions conducted by Industry Experts.
  • Weekdays: Doubt clarification support through WhatsApp.
  • Flexible learning with Lab Access from home through VPN.

Duration & Timing

  • More than 400Hrs of Interactive learning.
  • 5 months - Physical Design Course (Weekends).
  • 3 Hours - Live lecture sessions Every Weekend.
  • 3 Hours - Live Online Lab Sessions Every Weekend.
  • Weekdays Doubt Clarification Support.

VLSI Tools & Lab

Synopsis Tools

  • Synthesis : Design Compiler Topographical
  • Physical Design: IC Compiler 2 (ICC2)
  • RC Extraction: Star RC
  • Physical Verification: IC Validator
  • Static Timing Analysis(STA): Prime Time SI

Technology Libraries To be Used:

  • 14nm FINFET Libraries

Lab Access:

  • Flexible learning running on high-end cloud servers
  • Access VLSI Lab anytime anywhere using VPN

Who Can attend this course

  • Working Professionals from the VLSI industry, currently working in some areas (RTL Design, Verification, FPGA Design, Analog Layout, Synthesis, STA, Characterization), but want to switch to Physical design online course (PD).
  • Working Professionals in Embedded / Electronics (PCB designing, assembling, testing..) / Software industries and interested in changing Career into the VLSI industry.
  • B.Tech/M.Tech freshers who have done Internships with any VLSI companies and are interested to improve skills.
  • Faculty working in Engineering Colleges / Universities, teaching VLSI subjects, interested to switch to VLSI.

Payments

  • Pay through Debit card/ Credit card/ Net banking/ UPI.
  • Avail no cost EMI option with ZERO processing charge from our financial partners. You can choose 6 to 9 months of EMI without paying any additional cost on interest.

Placement Assistance

  • Our Placement Desk works closely with the leading VLSI companies to meet their entry level skilled engineer hiring needs and arranges interview opportunities for our trained engineers. The Hiring companies include both MNC and Service Companies.
  • We provide placement support as a complimentary service until the candidate gets the job. Interested candidates need to register with the placement desk for further assistance. For more information, please speak to our Learning Advisor.
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Why Choose ChipEdge

Online
VLSI Lab

Synopsys
Tools

Expert
Trainers

Mock
Interviews

Placement
Assistance

Technical
Presentation Skills

Industry
Relevant Courses

State of the
Art LMS

Industry
Connect

Alumini
Network

Curriculum - Online Physical Design Course

  • Introduction to Linux,
  • Command Line Operators,
  • File Operations, Processes,
  • Text Editors,
  • Text Manipulating,
  • Network Operations,
  • Special Keystrokes
  • GVIM

  • Number System, Boolean Algebra,
  • SOP and POS, K-Map,
  • Combinational circuits, Sequential circuits,
  • Finite State machines,
  • Frequency Division,
  • Setup and Hold time checks,
  • Advance Design Issues: Metastability, Noise Margins, Power, Fanout, Timing Considerations, FIFO Depth Calculation

  • Electronic Devices, Power Sources, Thevenin and Norton Theorem
  • Semiconductors Device Physics: Atomic Structure, Electronic Configuration, Doping, Diode - Biasing and VI Characteristics
  • MOSFET: Regions of operation, VI Characteristics
  • Function implementation using CMOS
  • Stick Diagram and Layout
  • Second-order effects: Body Effect, Channel length modulation, Punch through, subthreshold conduction, DIBL
  • Process Technology: Clean Room, Wafer manufacturing, Oxidation, Diffusion, Ion Implementation, Lithography

  • Introduction to Verilog
  • Applications of Verilog HDL
  • Verilog HDL language concepts
  • Verilog language basics and constructs
  • Data Types, Nets and registers, Arrays
  • Verilog Operators : Logical operators, Bitwise and Reduction operators, Concatenation and conditional operators, Relational and arithmetic, Shift and Equality operators, Operators precedence.
  • Type of assignments: Continuous assignments, Inter/Intra assignments, Blocking and Non Blocking assignments, Execution branching,Tasks and Functions
  • Finite State Machine (FSM) : Basic FSM structure, Moore Vs Mealy, Common FSM coding styles, Registered output.

  • ASIC Design flow and role of Synthesis
  • Synthesis flow
  • writing timing constraints in SDC format
  • Constraining the design for timing, power, area goals, set optimization techniques.
  • Synthesize the design.
  • enerate and analyze the reports, save the netlist and SDC.

  • Formal Verification
  • Understanding & Matching compare points
  • Debugging non equivalent points
  • What-If Analysis

  • Features of TCL and Applications.
  • TCL commands, Variables, arithmetic expressions, comments, identifiers, reserved words, data types, decisions, loops, arrays, strings, file I/O and procedures.
  • Scripting exercises from simple problems to complex problems, in an incremental manner and using tools like Prime Time, ICC2.

  • Introduction to physical design and Physical Design Flow, Data preparation : Files required for PD ( Netlist, SDC, Libraries, Technology files, TLU+), the contents of each input file.

  • Sanity Check
  • Goals of Floorplanning
  • Different aspects of floor planning
  • Rectangle/Rectilinear floor plans
  • Die size estimation (Core Utilization, Aspect ratio)
  • IO placement
  • Macro placement and guidelines
  • Channel-width estimation

  • Goals of Power Routing
  • Power distribution structure (Rings, straps and follow-pin/std cell rail)
  • Metal stack information
  • Power planning methodology
  • IR drop analysis, types of power consumption
  • Why Low power and low power techniques. Electro-migration analysis

  • Goals of Placement, types of placements
  • Pre-place (End-cap, Tap & I/O Buffer) cells
  • Placement optimization
  • Congestion analysis
  • Timing analysis
  • Tie-cells
  • High-Fanout Net Synthesis
  • Scan chain re-order
  • Path Grouping and creating Bounds

  • STA Overview and concepts
  • Basic timing checks (setup, hold)
  • Understanding timing constraints (SDC)
  • Timing corners
  • Timing report analysis
  • General optimization techniques
  • Typical causes for timing violations and strategies for fixing the same
  • Pre-CTS optimization to Fix setup violations.

  • Goals of CTS, Types of Clock-tree
  • Constraints for CTS
  • Building clock tree
  • Analyze the results
  • Post-CTS optimization : Fixing Setup and Hold violations.

  • Goals of Routing
  • Stages of Routing: Global Routing, Track assignment and Detail Routing
  • Routing options
  • Fixing of routing violations (DRC, LVS)
  • Post route optimization
  • Issues in routing and guidelines for optimum routing results.

  • Post layout STA using SPEF
  • Multi Mode Multi Corner STA
  • Derating factors
  • PVT, OCV Variations
  • Crosstalk Analysis

  • What is ECO
  • Types of ECO
  • Timing & Functional ECO
  • Performing the ECO placement and routing.

  • Physical Verification (DRC, LVS),
  • IR drop analysis,
  • Electro-Migration Analysis

  • Projects will be given converging Netlist to GDSII flow. Various projects that will allow the students to understand the intricacies of implementation for minimum area, low power, high performance. The method of execution will be similar to typical block level Physical Design work/project in the industry. Block level input database will be given and the participant has to deliver GDS II, after cleaning all the issues during sign-off checks.
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What Our Learners Have to Say

I have accomplished Physical Design course from, I feel so lucky that I had chosen the weekend batch because there I was under the supervision of the most highly experienced ... Read More

- Mohd Shadmaan

I joined Chip Edge Technologies for learning Physical Design course. I understood the concepts very well and the Trainer explained nicely with examples. Lab gave me ... Read More

- Thumati Moses

I Choose a weekend physical design course from ChipEdge, it is a good resource where you will never get any institute like ChipEdge. Nice faculty, they'll teach theory and lab parallelly. ... Read More

- Venkat Ramakrishna

FAQ

Training is delivered in Instructor Led Virtual Classroom mode, on weekends. To attend the live sessions, you need to login into the e-learning portal. For Lab access, you will connect to the ChipEdge VLSI lab through VPN.

The course will be delivered by Senior VLSI Engineer with lab assistance from junior VLSI Engineer. Both are currently working in VLSI industry on latest technologies.

ChipEdge trainers are typically having 10 to 20 years of VLSI industry experience and currently working in latest technologies. They are typically project leads or project managers and are selected for their domain expertise, passion for sharing knowledge as well as good teaching skills.

They are available on weekends only, during class hours for live interaction.

Instructor led online courses on weekends, are primarily designed for working professionals who want to upskill themselves.

With shrinking technology nodes and increasing complexity of Chips, engineers are required to enhance their skills to stay relevant in their careers and increase their productivity.

Online courses can help you learn new skills as well as increase your knowledge in the area you are currently working. Skills that take years to master in the workplace can be imbibed in weeks using our combination of theory classes, hands-on training sessions, projects. As these sessions are delivered by Senior VLSI engineers with 10 to 20 years of industry experience, learning from their experiences is a big takeaway from these courses.

Considering time constraints for all working professionals, you can attend these courses from home.

We use the latest versions of Synopsys Tools, with a dedicated tool license for every trainee during the lab/project work. 14nm libraries are used for labs, projects.

Synopsys tools are used by majority of product / MNC companies in semiconductor(VLSI) industry world wide, not just in India.

Lab Access is provided through VPN. This gives the flexibility to do labs anytime, anywhere at your convenience. All you need is a good broadband connection and a laptop.

It varies as per the course duration (short / long). please check “Lab” tab, in course pages. Our course counselors can help you as well.

We do have installment options for some courses. And EMI option is available through our partner organizations, who provides loans for training programs. please check with our Course Counsellors.

ChipEdge provides placement help to all candidates by providing them industry interview opportunities.

After a successful course completion, certificates will be provided.

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