Physical Design Mentor – (Full-time / Weekend)

Job Title: Physical Design Mentor (Full-time / Weekend)
Experience: 10 to 25 years
Position Type: Full-time / Weekend Engagement
Location: Bangalore

We are looking for a passionate and technically skilled Physical Design Mentor to guide and train students pursuing careers in VLSI. This role involves hands-on lab sessions, technical mentorship, and active participation in shaping the next generation of physical design engineers. Ideal candidates will have strong expertise in physical design flows and a genuine interest in teaching.

Key Responsibilities:

  • Lead and Support Lab Sessions: Deliver lab sessions covering the entire physical design flow — including synthesis, floorplanning, placement, CTS, routing, and timing closure.
  • Mentor and Guide Students: Offer one-on-one and group technical guidance, help students navigate EDA tools and solve real-world design problems.
  • Review and Evaluate Work: Assess lab work, assignments, projects, and quizzes; provide actionable feedback to improve student understanding.
  • Support Capstone Projects: Guide students through implementing full physical design projects from RTL to GDSII, focusing on practical, tool-based skills.
  • Develop and Update Course Material: Contribute to creating and refining assignments, tutorials, and lab manuals on advanced topics such as power optimization, clock tree synthesis, and DRC/LVS.
  • Collaborate with Academic Team: Work closely with instructors and program coordinators to ensure consistency, quality, and effective delivery of the course.

Required Skills & Experience:

  • Physical Design Expertise: Strong understanding of digital design fundamentals, CMOS concepts, and the physical design flow (synthesis, floorplanning, placement, CTS, routing, DRC/LVS).
  • EDA Tool Proficiency: Hands-on experience with industry-standard EDA tools such as Cadence Innovus and Synopsys ICC2.
  • Scripting & HDL Knowledge: Proficiency in TCL, Python scripting, and a working understanding of Verilog/VHDL.
  • Communication: Excellent ability to explain complex technical concepts clearly and effectively.
  • Organizational Skills: Capable of managing multiple lab sessions, grading responsibilities, and student interactions efficiently.
  • Teaching/Training Experience: Prior experience in teaching or mentoring students in VLSI/Physical Design is preferred.

Required Qualifications:

  • Education: B.E./B.Tech in ECE/EEE, M.Sc (Electronics/Physics), or M.Tech in VLSI or related fields.
  • Experience: Prior teaching, mentoring, or industry experience in Physical Design or a related VLSI domain.
  • Certifications: Certifications in physical design tools (e.g., Synopsys ICC, Cadence Innovus) are a strong plus.

Why Join ChipEdge?

  • Opportunity to work with a dynamic and passionate team.
  • Contribute to shaping the future of Electronics Engineering education.
  • Competitive salary and benefits.
  • Be part of an emerging sunrise technology and business in India and globally.
  • Mentoring and imparting skills reinforce your foundational knowledge and can lead to a highly rewarding career after gaining experience with ChipEdge, after a minimum retaining period with ChipEdge.

How to Apply:  Interested candidates can send their resume and a cover letter to hr@chipedge.com with the subject line “Physical Design Mentor (Full-time / Weekend)

About ChipEdge: ChipEdge is a premier VLSI training company dedicated to bridging the gap between academic knowledge and industry requirements. Our mission is to provide high-quality training programs that empower students and professionals with the skills needed to excel in the semiconductor industry. We strive to make a significant impact in imparting VLSI skills, an emerging sunrise technology and business, in India and across the globe.

Join us in our journey to educate and inspire the next generation of Electronics Engineers!

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