05
May

Ranjana, Successfully returned to Industry after a career break, joined Graphene Semiconductor as DFT Engineer

I have done my Masters in VLSI Design and have worked for few years. 1 year experience in RTL verification and 1 year Teaching experience. After that I have a gap of 4 years as break taken after maternity.

ChipEdge DFT course structured with weekend classes and VPN facility was very helpful. Also I could change my profile from DV to DFT with the help of the ChipEdge Placement Assistance and got placed in Graphene Semiconductor.

I extend my sincere thanks to the Trainer and the entire ChipEdge team for the support and encouragement to start my career once again.