A Phase-Locked Loop, or PLL, is a control system that locks an output signal’s phase to match the input signal’s phase. Think of it as a way to make sure that two signals stay in sync with each other, just like keeping two clocks showing the same time.
With this basic understanding of PLL it’s easy to understand PLL in VLSI(Ver-Large-Scale Integration) as it works around the same basic construct.
In this blog, we will learn about PLL in VLSI. As you go through the blog you will find that PLLs are not any kind of physical components that you would see on a chip, rather they are functional blocks made up of transistors and other elements in VLSI technology.
Key Components
The important components that make up the PLL are the phase detector, low pass filter, and voltage-controlled oscillator.
- Phase Detector(PD): PD compares the input signal with the output signal. It tells if the output signal is ahead or behind the input signal.
- Low Pass Filter(LPF): LPF cleans up the error signal generated from the phase detector. The cleaning is done by removing high-frequency noise.
- Voltage-Controlled Oscillator (VCO): VCO creates a signal whose frequency is adjusted based on the input voltage. For example, if the input voltage comes in to be 3.3V then VCO calculates the output voltage proportional to input voltage.
How does PLL Work?
There are different variations or different design architectures of PLLs.
There are analog phase-locked loop (APLL), also referred to as a linear phase-locked loop (LPLL), digital phase-locked loop (DPLL), all digital phase-locked loop (ADPLL), and software phase-locked loop (SPLL). Though these PLLs vary in their internal architecture and components, they hold the same general functionality of synchronizing an output signal to a reference input signal by providing feedback control.
A PLL works by adjusting the VCO until its output matches the input signal in frequency. As mentioned earlier, if the input signal is 3.3 V, the output produced should match 3.3 V. If the input signal changes, the PLL quickly adjusts to keep them locked together.
PLLs and their applications don’t limit themselves to just basic synchronization, they also deal with common challenges arising when transferring signals between different clock domains. PLLs provide a clean and stable clock signal in the target domain. So, what we want to say is that PLL reduces this clock domain crossing (CDC) problem.
Practical Applications
PLLs are used in many electronic devices like mobile phones, televisions, radios, and Wi-Fi routers to name a few. For example, PLL in radio will help in generating precise radio frequencies that are needed to tune the radios to a particular station. A PLL also helps in accurate data transmission. PLLs filter out unwanted noise from signals, thus improving the performance of circuits.
Overall, PLLs are found majorly in the following :
Microprocessors: In CPUs, PLLs are used to generate high-frequency clock signals from low-frequency sources. This helps in boosting processing speed.
Communication Systems: PLLs are used in mobile phones to lock carrier frequency, thus ensuring clear communication.
Audio Systems: In terms of radio signals, PLLs reduce jitter and improve sound quality.
Conclusion
This article covered the definition of a PLL, its key components, how it works, and its practical usage in the world of VLSI.
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