Lay Desai, M-Tech Intern, Intel Corporation

Lay Desai, M-Tech Intern, Intel Corporation

I have done B.E. in E&C from SCET, Surat, Gujarat. M.Tech in VLSI Design from VIT University, Chennai Campus.Have 1 year of experience as FPGA Design Engineer at Mistral Solutions pvt ltd, Bangalore.Did internship at Intel Corporation, Bangalore during last year.

Before joining ChipEdge was not expecting much but after completion i can say that almost all physical design concepts were covered with hands on lab. Along with Freshers like me in physical design there were experienced professionals who were also taking up the course. Due to the experienced professionals i got depth knowledge in physical design because of their questions and even ended up in getting a job.

ChipEdge provides hands on lab experience with Synopsys ICC tool.