The hierarchy approach, sometimes known as the “divide and conquer” strategy, is breaking a module down into smaller units and then repeating the process on those units until the complexity of the smaller portions is manageable. This method is often very comparable to software development, where complex programs are divided into smaller and smaller portions until simpler subroutines with clear functions and interfaces can be constructed. A VLSI chip’s design may be categorized into three areas. In each area independently, a hierarchy structure can correspondingly be specified. However, it is crucial for the design’s simplicity that the hierarchies in various domains can be simply mapped into one another. Partitioning a complicated system into its numerous functional pieces will help with the actual manifestation of these blocks on the chip in the physical environment. To create a usable floor plan, the approximate size and shape of each sub-module should be calculated.
Also read: A brief overview of ASIC Design Flow
Six categories can be used to split the design hierarchy in VLSI.
Step one: System specifications come first. It is characterized both broadly and specifically, as well as in terms of its features, speed, size, etc.
Step two: The next is the abstract high-level model, which provides details on how each block behaves and how they interact with one another in the system.
Step three: The following step is logic synthesis. In this stage, the network’s logic architecture is provided by outlining the basic gates and building blocks required to construct each unit.
Step four: The next step involves circuit designs in which transistors are employed as switches and Boolean variables are seen as changing voltage signals. The network is constructed on a small patch of silicon at the next stage of physical design.
Step five: Manufacturing is the final phase, after which a finished design process is transferred to the production line.
The Top-down design involves numerous processes that are initially highly theoretical and abstract, and there isn’t a direct connection to silicon until several steps are finished. This architecture is acceptable in the design of contemporary digital systems and is comparable to the Cell-based Design Flow. In top-down design, co-designing while integrating Hardware/Software is essential. Contrarily, bottom-up design begins at the silicon or circuit level by creating basic components like logic gates, adders, and registers. This design, which is comparable to the Full-custom Design Flow, is typically appropriate for smaller projects. There are many benefits to the design hierarchy in VLSI. When building complicated chips, design hierarchy in VLSI, for instance, improves productivity.
This does not imply that Full-flat design is ineffective or that Hierarchical design has entirely supplanted that method. However, during the implementation stage, Hierarchical design offloads the burden of Full-flat flow. The majority of businesses are still employing Full-flat-flow at the signoff stage to double-check everything and ensure there are no errors in between. Nevertheless, employing a hierarchical method allows designers to save a lot of time, even during the implementation phase.
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