Career growth for a DFT Engineer DFT or “Design For Testability” is a...
The Physical Design Full-time course is designed for students looking to get comprehensive training that covers all the topics needed to start a career in the VLSI industry as a Physical Design Engineer. The course is designed by keeping the latest industry requirements in mind and will be covered by trainers experienced in Physical Design. All the relevant concepts, the latest methodologies, the support functions required as well as placement specific coaching will be provided over the duration of the course. Up to 70% of the time will be utilized for hands-on training along with multiple projects.
- Trainer with 10+ years of solid Physical Design experience in Industry.
- Synopsys IC Compiler ICC2,VCS, Design Compiler, starRC and Prime time tool
- The course is designed by experts in Physical Design, as per the needs of the industry.
- 70% of the course time on labs, to facilitate hands-on learning using tools.
Training Delivery Model
- Instructor-led classroom training sessions. – Mondays to Fridays
- Each topic is followed by Lab sessions on that particular module.
- Closed group support with Trainers and Lab Assistants on WhatsApp.
What You Will Learn
- You will get hands-on experience on the physical design flow, using industry-standard Synopsys tools.
- This should help to give you confidence, to execute block-level physical design work which industry is looking for and try for physical design positions.
Soft Skills Training & Mock Interviews
- Soft skills training by leading corporate soft skill trainers.
- Mock Interviews from the Senior Industry Professionals.
- Training Materials will be provided, through LMS (online learning management system) which can be accessed online any time, any device.
- Course reference materials, videos ..etc will be provided through LMS.
Who Can Join This Course
- Graduate Freshers(B.E/B.tech) in ECE/EEE/Instrumentation/Telecom who have graduated in 2019 or later.
- Post-Graduate Freshers (M.Tech) with specializations like VLSI/Embedded/Power Electronics /Communications/Instrumentation..etc. who have graduated in 2019 or later.
- Experienced Engineers / Faculty who have graduated in 2018/ earlier, but have some industry (any) / teaching experience and interested to switch to VLSI industry. And are interested in doing a full-time course, then the weekend.
ChipEdge follows a comprehensive selection criterion for each candidate. The selection process consists of
- Written Test (online) – Syllabus includes Aptitude, Digital Electronics, CMOS fundamentals, Verilog ..etc.
- Interview – Face to Face interview, to assess the fundamentals knowledge, learning ability, passion for VLSI, suitability for VLSI industry, communication skills, attitude, can be trained / not.
ChipEdge uses the latest versions of Synopsys tools for different modules of the course. Each Student gets a dedicated license during the lab.
Below is the list of Synopsys tools to be used for each module.
- Digital Design with Verilog: VCS
- Synthesis – Design Compiler Topographical
- LEC: Formality
- Static Timing Analysis(STA): Prime Time SI
- Physical Design: IC Compiler 2 (ICC2)
- RC Extraction: Star RC
- Physical Verification: IC Validator
Synopsys ICC2 is a leader in Physical Design tools and used by the majority of the MNCs/ product companies in Bangalore / India.