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Low Power Implementation (PD) using UPF

Most of the chips in mobile / portable devices are low power intensive, designed using advanced low power techniques, which include multi-voltage, power gating, multi-VT ..etc.  And these low power specs are catpured in UPF/CPF formats.

The Physical Design (PD) engineers find it difficult, unless they understand these low power techniques and associated terminology (level shifters, isolation cells, state retention cells..) using CPF/UPF formats with respective tools.

This course is designed to help PD engineers understand low power implementation aspects, to be able to handle low power designs better and be successful in their roles.

Training Delivery Model:

  • Lecture & Lab sessions go hand in hand, like corporate training.
  • Sessions will be interactive in nature.
  • Physical Design (PD) Engineers with a minimum 1 year of hands on PD experience using ICC / Cadence Encounter / innovus
  • Technical Managers who want to learn Low power implementation flow
Module 1: Low power basics

Significance of Low power designs – Use cases; Types of power dissipation; LP Techniques- Power gating, Clock gating, DVFS, Multi-VDD, Multi VT; Power management cells & usage – ISO, LVL, P-Switch, RET, AON

Module 2: UPF

Why UPF, Power domains, Power state table, Power gating strategies, LVL-ISO strategies, SRSN, Activity – Developing UPF on sample design

Module 3: Low power implementation techniques

P-Switch Daisy chain, Voltage area, ISO-LVL placement, MV-CTS, AON buffering & feedthrough, ECO implementation, Leakage recovery, Dynamic power optimization

Module 4: Low power checks

Introduction to Inrush current analyses and low power signoff checks  – Demo of rules in ICC (Power intent checks, Implementation checks)

**Each module has associated labs and will be practiced immediately after lecture session.

**Lab & Course is limited to only block level

Tools to be used:

  • Industry Standard Tools will be used.

Assessment & Certification:

  • Course completion certificate from ChipEdge.
  • At the end of the course, Course learning will be assessed as per Bloom’s Taxonomy.
  • Certification and Course Credits leading to M.S. degree, from Global University of Engineering, USA


Trainers are  having 8+ years of strong Physical Design on low power intensive designs. Till recently they were with INTEL and  has worked on multiple low power designs using UPF with ICC.  They have passion for teaching.

They are co-founders of VLSI Services company, offering services on PD ..etc.


My expectations to join this course was to understand Low Power concepts and exposure. I came here with no basics idea on low power but after coming here i got confidence on Low power. Trainers are technically they are strong and shared more in detail with more patience. Thanks for them. Trainer will help in all accepts even i am new to ICC tool. Now I am confident and happy to get new explorer, concepts, and friends. For my case, i use to travel. Still even i am happy to travel to this good technical session.
author-img - Rajesh
10years of experience working as Senior Design Engineer


I joined this course to be a good and experienced low power design engineer and to be able to independently handle a low power design during the PD implementation in upcoming projects. End of the course got good understanding on low power concepts and techniques. Trainer has good understanding on low power concepts and techniques helpful in clearing all queries, not only on low power concepts but also on the PD techniques. The quality of teaching of is just “AWESOME”. This course improved my thinking on PD concepts and low power techniques implementation.
author-img - Anonymous
5+ Years , PD Engineer


I joined this course to know Low power concepts, techniques and methodologies and this course met my expectations. Trainers are experienced and answers all the questions answered. Now I am confident and it will help to handle low power block confidently.
author-img - Anonymous
2years as PD engineer


I joined this course to learn ICC and low power. Trainers have given their best on teaching low power , I am satisfied with the concepts they have given. The teaching quality is “ABOVE EXPECTATIONS”. Trainers were helpful & they have given their best to explain all our queries. Program was very good, course was well defined.
author-img - Ram
6years of exp at Maxim


My expectations jo joining this course was to understand the behavior of UPF commands and this course met my expectations. Trainers having good practical knowledge and good attitude. Good response from the trainers for all the questions asked. Good quality of materials provided during the course. Now I am confident to handle LP design in future
author-img - Naveen
3years of exp in PD at Mediatek


I joined this course to be familiar with LPD. This course helped me to understand the basics and to be familiar with UPF and other low power concepts. Trainer is very good in teaching and clearing all the doubts. It was good experience to be part of Chipedge Technologies and learned LP concepts from basics.
author-img - Anonymous
5years exp in PD at Digicom