This course is designed for the working professionals with at least 1+ years of work experience in VLSI industry, who want to switch to Analog and mainly High-Speed IO Circuit Design field. Apt for those who are developing General Purpose or Low-Speed IO Circuits.
The uniqueness of this course
All the concepts are reinforced with circuit simulation, available 24×7.
Self-experimenting with IFs and BUTs of circuit configurations which help in addressing practical problems.
The platform provides an opportunity for fast learners, to go beyond specified lab sessions and attempt more complex designs.
Completing course within a given time limit itself is an accomplishment
What do you get out of this Course?
Exposure to basic concepts of IO Circuits, fundamental blocks used in almost all of Analog Circuits. High-Speed IO circuits used in serial link interfaces, which are analog in nature.
A chance to design Digital and High Speed IO Circuit from scratch with real life specifications.
Hands on experience in designing analog building blocks and high speed circuits, since more than 60% of the course duration being spent on lab sessions
What Opportunities could open up for you ?
For those intend to switch the field: Entry level IO circuit designer opportunities will openup
For those already in IO Field will get:
Opportunity/confidence to move towards High Speed IO Design
Understand customer problems/requirements quickly, and capability to provide optimum solutionHigh Speed IO Circuits are essential part of any serial link. With various standards and process nodes around, career opportunities for good high speed IO circuit designer are ample high – both in IP companies and product companies.
Pre-requisites:
Basic understanding of MOS Circuits and operation of MOS inverter.
Understanding of Custom Layout
Training Delivery Model:
Weekends (Saturdays): Instructor Lead classroom training
Each Lecture session will be followed by Labs on that module.
Weekdays : Lab support through Email and WhatsApp
Flexible learning with 24/7 Lab Access from home through VPN
Training Material & Certification:
Hand outs of training materials will be provided
Course completion certificate from ChipEdge
Course Credit Certificate leading to MS Degree under Global University of Engineers, USA
Who Can Attend This Course:
Working Professionals from VLSI industry, currently working in characterisation of standard cell and/or IO Cell, who want to switch to IO Circuit design
Working Professionals developing IBIS model and IO Support kind of role, who would like to switch to IO Circuit design and characterisation role
Working professional doing Layout — either Standard Cell or IO or Analog and would like to switch to circuit design
Working IO Circuit Design Engineers who want to fill the gaps in their understanding & strengthen circuit design concepts to contribute effectively in their current role
Faculty working in Engineering Colleges / Universities, teaching VLSI subjects, who would like to get practical exposure to circuit design
Course Content Outline:
Modular courses: Basics of IO, Analog and High-Speed IO Design
Module-1 : (Basics of IO Design)
Week-1
Lecture : Introduction to IO Cells, Specifications, Contents of IO Library (various views and use), Basics of MOS devices (Brush up of basics), Spice Simulation Basics
Lab: Schematic draw and simulation of inverter
Week-2
Lecture: Design of O/P driver, pre-driver and level shifter circuit, Design of Receiver Circuit
Lab: Design, Simulation, and Verification of O/P driver, pre-driver and level shifter circuit
Week-3
Lecture: Orientation for ESD, Packaging effects, High-Speed IO
Lab: Design, Simulation, and Verification of receiver circuit, Verification of remaining part of output structure
Module 2: Basics of Analog Design
Week-4
Lecture: Device Characterisation, Current Mirror
Lab: Device characterization by simulation and current mirror
Week-5
Lab: Amplifier basics and stability analysis theory
Lecture: Circuit design and verification of amplifier for all the parameters
Module 3: High-Speed IO Circuits – CML Driver and Receiver
Week-6
Lab: Specification of CML Driver Circuits and challenges
Lecture: Design and verify CML Driver (Final stage)
Week-7
Lab: Complete the Design and verification of Multistage CML Driver
Lecture: Complete the Design and verification of Multi stage CML Driver
Week-8
Lab: Introduction to jitter and jitter analysis in SERDES, Q&As, and tips on building career in Analog Circuit Design
Lecture: Design and Verification of CML Receiver
Module Outcome:
At the end of this module, the participant will be able to
Understand GPIO Circuit Design
Understand Basic Analog blocks
Create High-speed IO Circuit
Tools to be used:
Industry Standard Tools.
Additional Lab Hours through VPN, to enable you spend more time on labs from home. This is on top of Trainer led lab sessions.
Trainer:
The trainer has work experience of more than 20 years in leading semiconductor MNCs in IO and Analog Circuit design field. His designs have been used in many successful products.
He is passionate about teaching and has devised and conducted many training sessions for entry/mid-level engineers throughout his career. He has created teams with young engineers and trained them to deliver cutting edge designs.
His training sessions are highly interactive and are dotted with practical tips out of his experience. He stresses and ensures that participants gets a firm hold on basic concepts, which help in solving design problems.
