Custom Layout Design

Course Overview:

This course is designed with the purpose of giving participants an in-depth training on custom layout concepts, techniques along with hands on knowledge expected of fresher-level aspirants in the VLSI industry. This course covers important topics like CMOS process fabrication technology, understanding of components like MOS transistors, resistors and capacitors used in these technologies and the theory behind various layout techniques like shielding, common centroid matching, guard rings, ESD protection, etc.

 All concepts are illustrated with hands on labs and assignments to help the attendee get familiar with producing industry standard analog layouts optimized for area and performance. The course is designed and will be delivered by experts in Analog Layout, as per the industry requirements with good emphasis on hands-on training, using Industry standard Layout tool with more than 50% time allocated to lab sessions.

Training Delivery Model:

  • Weekends (Saturdays) : Instructor Lead classroom training
  • Each Lecture session will be followed by Labs on that module.
  • Weekdays : Lab support through Email and WhatsApp
  • Flexible learning with 24/7 Lab Access from home through VPN

Training Material & Certification:

  • Hand outs of training material will be provided.
  • Course completion certificate from ChipEdge.
  • Certification and 2 credits (leading to MS degree) from Global University of Engineering, USA

Who Can Attend This Course:

      • Engineers working in Embedded / Electronics (PCB designing, assembling, testing..) and interested to Change Career into VLSI industry for work satisfaction & Career growth.
      • Layout Engineers (analog / std cell / memory ),  who would like fill the gaps in understanding and strengthen the expertise.
      • Interns / Entry level Layout Engineers, who have started working on layouts, but not received any formal training.
      • Circuit Design Engineers (analog / std cell / memory) seeking to learn Layout.
      • Engineers working in different domains of VLSI, but interested to pursue career in Custom Layout.
      • Faculties working in Engineering Colleges / Universities, teaching VLSI subjects.

Pre-requisites:

Good Knowledge on below topics is required. One need to refresh his/her knowledge thoroughly, before the course as these fundamentals are essential to the course, but not part of the course curriculum.

      1. Working knowledge of linux.
      2. Knowledge of digital Electronics fundamentals.
      3. Knowledge of CMOS fundamentals

Educational Qualification:

  • B.E / B.Tech in Electronics / Electrical / Instrumentation
  • M.Tech / M.S  in VLSI / Embedded Systems / Electronics / Similar

Course Content outline:

Week 1 : Fabrication Process

  • Basic steps of IC fabrication
  • CMOS IC fabrication
  • Deep Submicron Technology

Week 2: Layout Editor Tool

  • Creating and managing libraries and cell.
  • Commands for Layout editing.
  • Commands for schematic editing.
  • Verification : DRC and LVS

Week 3 : Layout or Physical Implementation

  • Understanding the schematic symbols and parameters
  • Resistor, Capacitor layout techniques
  • Cmos and BiCMOS layout techniques

Week 4 : Standard Cell Layout

  • Layout of Inverter, AND, OR, NAND, NOR, AOI, OAI, LATCH, FLOP,

Week 5 : Matching

  • Matching techniques
  • common centriod, interdigitized and proximity matching.
  • Matching of Resistors, Capacitors
  • Matching of mos transistors

Week 6: Complex Layout enemies

  • Electro-migration
  • Power/Signal IR Drop
  • cross-talk and coupling
  • Electrostatic Discharge

Week 7 : Deep Submicron Layout Issues

  • Shallow Trench Isolation (LOD)
  • Well Proximity Effect.

Week 8 : Analog and Mix signal Layout

  • Single stage differential opamp layout
  • Input pair, current mirrors and output stage.
  • Two stage differential opamp layout
  • Input pair, differential routing, Power routing, offset minimizing.

Week 9 : Memory Layout

  • Why memory layout different than analog layout
  • Memory layout flow
  • Types of memory layout (SRAM/DRAM/ROM)
  • Introduction to SRAM memory layout
  • Fixing few manually created leaf-cell errors which impact
  • Impact of IR, EM and DFM .
  • SRAM memory design architecture
  • Words line and address line
  • SRAM rows and column design

Week 10 : Building blocks of SRAM

  • Memory Bit cell
  • Row decoder
  • Word line driver
  • Sense amplifier
  • Control block
  • Misc digital logic.
  • Pitch Calculation for blocks.
  • Power Planning
  • Assignments based on above theory.

Week 11 : Memory Layout practice

  • Row decoder layout
  • Sense amplifier layout
  • Drivers and Decoder layout

Project

  • Analog Projects like LDO, Op-amp & other similar size projects will be executed in latest technology nodes.
  • On memory,  trainees will be asked to do layout of one memory.
  • Std layouts will be done as part of labs & assignments. No separate project will be executed.

Tools to be used:

  • Industry standard Layout tools will be used.
  • Additional Lab Hours through VPN, to enable you spend more time on labs from home. This is on top of Trainer led lab sessions during Sundays.

Assessment & Certification:

  • Course completion certificate from ChipEdge.
  • At the end of the course, Course learning will be assessed as per Bloom’s Taxonomy.
  • Certification and credits leading to M.S degree from Global University of Engineering, USA.

Trainer:

Trainer is having 10+ years of VLSI Industry experience in various organizations and currently working with a product MNC company.

He had worked with product, IP based and Services based companies and has deep knowledge in different layout areas i.e. analog and mixed signal layout, digital and memory layout and standard Cell Layout.

Experienced on different technology nodes from 700nm to 28nm. worked on multiple designs on analog IP’s ADC, DAC, PLL , buffers and different classes of Amplifiers.

He is passionate about teaching and enjoys sharing his knowledge.

Testimonials

Course met my expectations & I learnt a lot of things. Training was excellent, gave confidence (as concepts were clear). Trainer is good in transferring the knowledge & clarifying doubts. Discussions were informative & crystal clear. All presentations were good enough to understand & acquire knowledge. Communication through group & WhatsApp made easier. Wish Chipedge to continue and maintain this quality of training. Hope to join in future courses.
author-img - Sai Kumar
M.tech(VLSI), 1 year internship Experience, Joined Analog Device

The topics are covered and presented in an outstanding form. Extremely happy with the teaching. repeated coverage of the topic till we are clear. explaining the concepts from the basics, replying emails even at late nights. The program was delivered as promised and all the topics has been covered. overall the course is great and i learned a lot from the course, especially the topics in the layout.
author-img - Sri Karthik
1.3yrs of IT experience, Switched to VLSI, Si2Chip

The course is well planned and executed. Experienced real-time training, from the Trainer having rich industry experience and tremendous knowledge. Trainers is brilliant in explaining the concepts with individual care. Lab facility through VPN helped a lot. Management showed dedication and involvement, in arranging the lab facilities, tool access. Course material is simple in understanding and rich in concepts. Be it technical question or some logistics issue, Received good support from management, Trainer through group mail as well as over phone.
author-img - Maheswar Reddy
2.5 years’ experience in PCB designing, Switched to VLSI, Intel

This course meets my expectations. Trainer never hesitate to explain the concepts multiple times. He is very much focused on the design flow rather than tool flow. He made us to work on any tool. Arrangements are fine. Assignments made us to work continuously without the break. Definitely i will take advanced layout courses if it is available.
author-img - Prem K
3 years in PCB design and signal integrity, Switched to VLSI, Intel

 

 

 

 

Lessons